Forensic analysis of published model weights reveals that six Chinese frontier AI models released between April and November 2026 were initialized on NVIDIA Blackwell GPUs, despite U.S. export controls restricting these chips to China. Researchers from Unemployment Labs identified hardware fingerprints by recovering the pseudorandom number generator (PRNG) seed and thread-count layout used during weight initialization in PyTorch via cuRAND. The Philox PRNG distributes initialization across threads per streaming multiprocessor (SM); Hopper chips (H100/H800/H200) use 132 SMs (270,336 threads), Blackwell B200/B300 use 148 SMs (303,104 threads), and GB200/GB300 use 152 SMs (311,296 threads). Surviving initialization patterns in untouched or weakly updated weights allow statistical matching to specific SM counts. DeepSeek-V4-Flash and MiniMax-M3 match the 148-SM B200/B300 layout; DeepSeek-V4-Pro, Kimi K3, Kimi K3.1-Pro, and Ling-3.1-flash match the 152-SM GB200/GB300 layout. Earlier models from the same labs (DeepSeek-V3, Kimi K2/K2.5, MiniMax-M2.7, Ling-3.0-flash) match Hopper's 132-SM fingerprint. Validation on physical H100, B300, and GB200 hardware confirmed exact bit-for-bit reproduction of preserved weights for DeepSeek-V3 (Hopper) and DeepSeek-V4-Flash/Kimi K3 (Blackwell). The method agrees with 24 known hardware disclosures. Statistical significance ranges from 49 to 1,385 sigma per model, far exceeding the ~8 sigma chance threshold across ~6 trillion seed-layout combinations. AMD MI300X configured to 148/152 units can mimic the layouts, but vendor-specific RNG differences exclude it for DeepSeek-V4-Flash (363/377 differing values match NVIDIA, 0 match AMD) and is deemed very unlikely for others. Estimated training scale: Kimi K3 and DeepSeek-V4-Pro required ~4,500 and ~3,000 Blackwell GPUs respectively (11,500 and 7,500 H100 equivalents), totaling ~12,000 Blackwell GPUs across five runs, implying hardware costs exceeding $500 million. The fingerprint indicates initialization hardware, not necessarily the full training cluster, and does not establish chip location or export violation.